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module_types.h
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1 /*************************************************************************\
2 * Copyright (c) 2002 The University of Chicago, as Operator of Argonne
3 * National Laboratory.
4 * Copyright (c) 2002 The Regents of the University of California, as
5 * Operator of Los Alamos National Laboratory.
6 * EPICS BASE Versions 3.13.7
7 * and higher are distributed subject to a Software License Agreement found
8 * in file LICENSE that is included with this distribution.
9 \*************************************************************************/
10 /* module_types.h */
11 /*
12  * Author: Bob Dalesio
13  * Date: 12-07-88
14  */
15 
16 #ifndef INCLmodule_typesh
17 #define INCLmodule_typesh
18 
19 /* Device module types */
20 /*
21  * all devices have corresponding entries in ~operator/db/src/menus.c
22  * changes must be made in both areas to keep the database and drivers in sync
23  */
24 /* & in comment indicates tested with card 0 */
25 /* % in comment indicates tested with card other than card 0 */
26 /* # in comment indicates that the Nth card has been tested */
27 /* !! never been tested */
28 
29 /*
30  * @# If any changes are made to this file, check the procedures
31  * ab_card, and vme_card in signallist.c, and get_address in sigmenu.c.
32  */
33 
34 #ifdef MODULE_TYPES_INIT
35 #define MODULE_TYPES_DEF(MT_DEF_PARM) MT_DEF_PARM
36 #else
37 #define MODULE_TYPES_DEF(MT_DEF_PARM) extern MT_DEF_PARM;
38 #endif
39 
40 /* Number of columns used in io_report. */
41 #define IOR_MAX_COLS 4
42 
43 /* I/O types */
44 #define IO_AI 0
45 #define IO_AO 1
46 #define IO_BI 2
47 #define IO_BO 3
48 #define IO_SM 4
49 #define IO_WF 5
50 #define IO_TIMER 6
51 #define MAX_IO_TYPE IO_TIMER
52 
53 /* bus types */
54 /* must correspond to the values in link types */
55 /* these defines are in ~gta/dbcon/h/link.h */
56 
57 
58 /* equates for the Allen-Bradley cards. */
59 #define AB_BASE_ADDR 0xc00000 /* base addr of first AB6008SV */
60 #define AB_MAX_LINKS 2 /* number of serial links from VME */
61 #define AB_MAX_ADAPTERS 8 /* number of physical adapters on a link */
62 #define AB_MAX_CARDS 16 /* max number of IO cards per adapter */
63 #define AB_CARD_ADAPTER 16 /* cards per logical adapter */
64 #define AB_CHAN_CARD 16 /* max channels per card */
65 
66 /* analog inputs */
67 #define AB1771IL 0 /* &% Allen-Bradley low level analog input */
68 #define AB1771IFE 1 /* &% Allen-Bradley low level analog input */
69 #define AB1771IXE 2 /* &% Allen-Bradley millivolt input */
70 #define XY566SE 3 /* & Xycom 12-bit Single Ended Scanned*/
71 #define XY566DI 4 /* &% Xycom 12-bit Differential Scanned */
72 #define XY566DIL 5 /* &% Xycom 12-bit Differential Latched */
73 #define VXI_AT5_AI 6 /* % AT-5 VXI module's Analog Inputs */
74 #define AB1771IFE_SE 7 /* % A-B IFE in 16 single-ended input mode */
75 #define AB1771IFE_4to20MA 8 /* % A-B IFE in 8 double-ended 4to20Ma */
76 #define DVX2502 9 /* &% DVX_2502 128 chan 16 bit differential */
77 #define AB1771IFE_0to5V 10 /* % A-B IFE in 8 double-ended 4to20Ma */
78 #define KSCV215 11 /* % KSC V215 VXI 16 bit differential */
79 #define AB1771IrPlatinum 12 /* % A-B RTD Platinum */
80 #define AB1771IrCopper 13 /* % A-B RTD Copper */
81 #define MAX_AI_TYPES AB1771IrCopper
82 MODULE_TYPES_DEF(short ai_num_cards[MAX_AI_TYPES+1])
83 #ifdef MODULE_TYPES_INIT
84  ={12,12,12, 4, 4, 6,32,12,12, 1, 12, 32, 12,12};
85 #endif
86 MODULE_TYPES_DEF(short ai_num_channels[MAX_AI_TYPES+1])
87 #ifdef MODULE_TYPES_INIT
88  ={ 8, 8, 8,32,16,16, 8,16, 8, 127, 8, 32,6,6};
89 #endif
90 MODULE_TYPES_DEF(short ai_interruptable[MAX_AI_TYPES+1])
91 #ifdef MODULE_TYPES_INIT
92  ={0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 0, 0,0,0};
93 #endif
94 MODULE_TYPES_DEF(short ai_bus[MAX_AI_TYPES+1])
95 #ifdef MODULE_TYPES_INIT
96  ={ 4, 4, 4, 2, 2, 2, 2, 4, 4, 2, 4, 2,4,4};
97 #endif
98 MODULE_TYPES_DEF(unsigned short ai_addrs[MAX_AI_TYPES+1])
99 #ifdef MODULE_TYPES_INIT
100  ={ 0,0,0,0x6000,0x7000,0xe000, 0xc014,0,0, 0xff00, 0, 0,0,0};
101 #endif
102 MODULE_TYPES_DEF(long ai_memaddrs[MAX_AI_TYPES+1])
103 #ifdef MODULE_TYPES_INIT
104  ={0,0,0,0x000000,0x040000,0x0c0000, 0,0,0, 0x100000, 0, 0,0,0};
105 #endif
106 
107 /* analog outputs */
108 #define AB1771OFE 0 /* &% Allen-Bradley 12 bit Analog Output */
109 #define VMI4100 1 /* & VMIC VMIVME 4100 */
110 #define ZIO085 2 /* & Ziomek 085 */
111 #define VXI_AT5_AO 3 /* !! AT-5 VXI modules analog outputs */
112 #define MAX_AO_TYPES VXI_AT5_AO
113 MODULE_TYPES_DEF(short ao_num_cards[MAX_AO_TYPES+1])
114 #ifdef MODULE_TYPES_INIT
115  = {12, 4, 1, 32};
116 #endif
117 MODULE_TYPES_DEF(short ao_num_channels[MAX_AO_TYPES+1])
118 #ifdef MODULE_TYPES_INIT
119  = { 4, 16, 32, 16};
120 #endif
121 MODULE_TYPES_DEF(short ao_interruptable[MAX_AO_TYPES+1] )
122 #ifdef MODULE_TYPES_INIT
123  = { 0, 0, 0, 1};
124 #endif
125 MODULE_TYPES_DEF(short ao_bus[MAX_AO_TYPES+1])
126 #ifdef MODULE_TYPES_INIT
127  ={ 4, 2, 2, 2};
128 #endif
129 MODULE_TYPES_DEF(unsigned short ao_addrs[MAX_AO_TYPES+1])
130 #ifdef MODULE_TYPES_INIT
131  ={ 0,0x4100,0x0800, 0xc000};
132 #endif
133 
134 /* binary inputs */
135 #define ABBI_08_BIT 0 /* &% Allen-Bradley generic Binary In 8 bit */
136 #define ABBI_16_BIT 1 /* &% Allen-Bradley generic Binary In 16 bit */
137 #define BB910 2 /* & BURR BROWN MPV 910 (relay) */
138 #define XY210 3 /* &% XYcom 32 bit binary in */
139 #define VXI_AT5_BI 4 /* !! AT-5 VXI modules binary inputs */
140 #define HPE1368A_BI 5 /* !! HP E1368A video switch */
141 #define AT8_FP10S_BI 6 /* !! AT8 FP10 slave fast protect */
142 #define XY240_BI 7 /* !! Xycom 32 bit binary in / 32 bit binary out */
143 #define MAX_BI_TYPES XY240_BI
144 MODULE_TYPES_DEF(short bi_num_cards[MAX_BI_TYPES+1] )
145 #ifdef MODULE_TYPES_INIT
146  ={ 12, 12, 4, 4, 32, 32, 8, 2};
147 #endif
148 MODULE_TYPES_DEF(short bi_num_channels[MAX_BI_TYPES+1] )
149 #ifdef MODULE_TYPES_INIT
150  ={ 8, 16, 32, 32, 32, 16, 32, 32};
151 #endif
152 MODULE_TYPES_DEF(short bi_interruptable[MAX_BI_TYPES+1] )
153 #ifdef MODULE_TYPES_INIT
154  ={ 1, 1, 0, 0, 1, 1, 1, 1};
155 #endif
156 MODULE_TYPES_DEF(short bi_bus[MAX_BI_TYPES+1])
157 #ifdef MODULE_TYPES_INIT
158  ={ 4, 4, 2, 2, 2, 2, 2, 2};
159 #endif
160 MODULE_TYPES_DEF(unsigned short bi_addrs[MAX_BI_TYPES+1])
161 #ifdef MODULE_TYPES_INIT
162  ={ 0,0,0xb800,0xa000, 0xc000, 0xc000, 0x0e00, 0xd000};
163 #endif
164 
165 /* binary outputs */
166 #define ABBO_08_BIT 0 /* &% Allen-Bradley 8 bit binary out */
167 #define ABBO_16_BIT 1 /* &% Allen-Bradley 16 bit binary out */
168 #define BB902 2 /* &% BURR BROWN MPV 902 (relay) */
169 #define XY220 3 /* &% XYcom 32 bit binary out */
170 #define VXI_AT5_BO 4 /* !! AT-5 VXI modules binary outputs */
171 #define HPE1368A_BO 5 /* !! HP E1368A video switch */
172 #define AT8_FP10M_BO 6 /* !! AT8 FP10 master fast protect */
173 #define XY240_BO 7 /* !! Xycom 32 bit binary in / 32 bit binary out */
174 #define MAX_BO_TYPES XY240_BO
175 MODULE_TYPES_DEF(short bo_num_cards[MAX_BO_TYPES+1] )
176 #ifdef MODULE_TYPES_INIT
177  ={12, 12, 4, 1, 32, 32, 2, 2};
178 #endif
179 MODULE_TYPES_DEF(short bo_num_channels[MAX_BO_TYPES+1] )
180 #ifdef MODULE_TYPES_INIT
181  ={ 8, 16, 32, 32, 32, 16, 32, 32};
182 #endif
183 MODULE_TYPES_DEF(short bo_interruptable[MAX_BO_TYPES+1] )
184 #ifdef MODULE_TYPES_INIT
185  ={ 0, 0, 0, 0, 1, 0, 0, 1 };
186 #endif
187 MODULE_TYPES_DEF(short bo_bus[MAX_BO_TYPES+1])
188 #ifdef MODULE_TYPES_INIT
189  ={ 4, 4, 2, 2, 2, 2, 2, 2 };
190 #endif
191 MODULE_TYPES_DEF(unsigned short bo_addrs[MAX_BO_TYPES+1])
192 #ifdef MODULE_TYPES_INIT
193  ={ 0,0,0xd800,0xc800, 0xc000, 0xc000, 0x0c00, 0xd000};
194 #endif
195 
196 /* stepper motor drivers */
197 #define CM57_83E 0 /* & Compumotor 57-83E motor controller */
198 #define OMS_6AXIS 1 /* & OMS six axis motor controller */
199 #define MAX_SM_TYPES OMS_6AXIS
200 MODULE_TYPES_DEF(short sm_num_cards[MAX_SM_TYPES+1] )
201 #ifdef MODULE_TYPES_INIT
202  ={ 8, 8 };
203 #endif
204 MODULE_TYPES_DEF(short sm_num_channels[MAX_SM_TYPES+1] )
205 #ifdef MODULE_TYPES_INIT
206  = { 1, 8};
207 #endif
208 MODULE_TYPES_DEF(short sm_interruptable[MAX_SM_TYPES+1] )
209 #ifdef MODULE_TYPES_INIT
210  = { 0, 0 };
211 #endif
212 MODULE_TYPES_DEF(short sm_bus[MAX_SM_TYPES+1])
213 #ifdef MODULE_TYPES_INIT
214  ={ 2, 2 };
215 #endif
216 MODULE_TYPES_DEF(unsigned short sm_addrs[MAX_SM_TYPES+1])
217 #ifdef MODULE_TYPES_INIT
218  ={ 0x8000, 0xfc00 };
219 #endif
220 
221 /* waveforms */
222 #define XY566WF 0 /* & Xycom 566 as a waveform */
223 #define CAMAC_THING 1 /* !! CAMAC waveform digitizer */
224 #define JGVTR1 2 /* & Joerger transient recorder */
225 #define COMET 3 /* !! COMET transient recorder */
226 #define MAX_WF_TYPES COMET
227 MODULE_TYPES_DEF(short wf_num_cards[MAX_WF_TYPES+1] )
228 #ifdef MODULE_TYPES_INIT
229  ={4, 4, 8, 4};
230 #endif
231 MODULE_TYPES_DEF(short wf_num_channels[MAX_WF_TYPES+1] )
232 #ifdef MODULE_TYPES_INIT
233  ={1, 1, 1, 4};
234 #endif
235 MODULE_TYPES_DEF(short wf_interruptable[MAX_WF_TYPES+1] )
236 #ifdef MODULE_TYPES_INIT
237  = {0, 0, 0, 0};
238 #endif
239 MODULE_TYPES_DEF(short wf_bus[MAX_WF_TYPES+1])
240 #ifdef MODULE_TYPES_INIT
241  ={2, 3, 2, 2};
242 #endif
243 MODULE_TYPES_DEF(unsigned short wf_addrs[MAX_WF_TYPES+1])
244 #ifdef MODULE_TYPES_INIT
245  ={0x9000, 0, 0xB000, 0xbc00};
246 #endif
247 MODULE_TYPES_DEF(unsigned short wf_armaddrs[MAX_WF_TYPES+1])
248 #ifdef MODULE_TYPES_INIT
249  = {0x5400, 0, 0, 0};
250 #endif
251 MODULE_TYPES_DEF(long wf_memaddrs[MAX_WF_TYPES+1])
252 #ifdef MODULE_TYPES_INIT
253  ={0x080000, 0, 0xb80000, 0xe0000000};
254 #endif
255 
256 
257 /* timing cards */
258 #define MZ8310 0 /* &% Mizar Timing Module */
259 #define DG535 1 /* !! GPIB timing instrument */
260 #define VXI_AT5_TIME 2 /* !! AT-5 VXI modules timing channels */
261 #define MAX_TM_TYPES VXI_AT5_TIME
262 MODULE_TYPES_DEF(short tm_num_cards[MAX_TM_TYPES+1] )
263 #ifdef MODULE_TYPES_INIT
264  ={ 4, 1, 32 };
265 #endif
266 MODULE_TYPES_DEF(short tm_num_channels[MAX_TM_TYPES+1] )
267 #ifdef MODULE_TYPES_INIT
268  ={10, 1, 10};
269 #endif
270 MODULE_TYPES_DEF(short tm_interruptable[MAX_TM_TYPES+1] )
271 #ifdef MODULE_TYPES_INIT
272  = { 1, 0, 1 };
273 #endif
274 MODULE_TYPES_DEF(short tm_bus[MAX_TM_TYPES+1])
275 #ifdef MODULE_TYPES_INIT
276  ={ 2, 5, 2 };
277 #endif
278 MODULE_TYPES_DEF(unsigned short tm_addrs[MAX_TM_TYPES+1])
279 #ifdef MODULE_TYPES_INIT
280  ={0xf800, 0, 0xc000 };
281 #endif
282 
283 /* AT830X clock cards */
284 MODULE_TYPES_DEF(long AT830X_1_addrs )
285 #ifdef MODULE_TYPES_INIT
286  = 0x0400;
287 #endif
288 MODULE_TYPES_DEF(short AT830X_1_num_cards )
289 #ifdef MODULE_TYPES_INIT
290  = 2;
291 #endif
292 MODULE_TYPES_DEF(long AT830X_addrs )
293 #ifdef MODULE_TYPES_INIT
294  = 0xaa0000;
295 #endif
296 MODULE_TYPES_DEF(short AT830X_num_cards )
297 #ifdef MODULE_TYPES_INIT
298  = 2;
299 #endif
300 
301 /*
302  * system controller cards.
303  * (driver looks for only one card)
304  */
305 MODULE_TYPES_DEF(long xy010ScA16Base)
306 #ifdef MODULE_TYPES_INIT
307  = 0x0000;
308 #endif
309 /*
310  * limit the size of the VXI logical address space
311  *
312  * <VXI LA BASE> = <VME SHORT ADDR BASE> + 0xc000
313  *
314  * LA VME address
315  * 0 <VXI LA BASE>
316  * EPICS_VXI_LA_COUNT <VXI LA BASE> + (EPICS_VXI_LA_COUNT-1)*64
317  */
318 MODULE_TYPES_DEF(unsigned char EPICS_VXI_LA_COUNT)
319 #ifdef MODULE_TYPES_INIT
320  = 32;
321 #endif
322 
323 /*
324  *
325  * address ranges for VXI A24 and A32 devices
326  *
327  */
328 MODULE_TYPES_DEF(char *EPICS_VXI_A24_BASE)
329 #ifdef MODULE_TYPES_INIT
330  = (char *) 0x900000;
331 #endif
332 MODULE_TYPES_DEF(unsigned long EPICS_VXI_A24_SIZE)
333 #ifdef MODULE_TYPES_INIT
334  = 0x100000;
335 #endif
336 MODULE_TYPES_DEF(char *EPICS_VXI_A32_BASE)
337 #ifdef MODULE_TYPES_INIT
338  = (char *) 0x90000000;
339 #endif
340 MODULE_TYPES_DEF(unsigned long EPICS_VXI_A32_SIZE)
341 #ifdef MODULE_TYPES_INIT
342  = 0x10000000;
343 #endif
344 
345 
346 /******************************************************************************
347  *
348  * Interrupt vector locations used by the MV167 CPU board.
349  * These are defined in mv167.h
350  *
351  * PCC2_INT_VEC_BASE 0x40 PCC interrupt vector base number
352  * any multiple of 0x10
353  * UTIL_INT_VEC_BASE0 0x50 VMEchip2 utility interrupt
354  * vector base number
355  * any multiple of 0x10
356  * UTIL_INT_VEC_BASE1 0x60 VMEchip2 utility interrupt
357  * vector base number
358  * any multiple of 0x10
359  *
360  * INT_VEC_CD2400_A 0x90 int vec for channel A
361  * INT_VEC_CD2400_B 0x94 int vec for channel B
362  * INT_VEC_CD2400_C 0x98 int vec for channel C
363  * INT_VEC_CD2400_D 0x9c int vec for channel D
364  *
365  * LANC_IRQ_LEVEL 3 LNANC IRQ level
366  * MPCC_IRQ_LEVEL 4 serial comm IRQ level
367  * SYS_CLK_LEVEL 6 interrupt level for sysClk
368  * AUX_CLK_LEVEL 5 interrupt level for auxClk
369  * SCSI_IRQ_LEVEL 2 scsi interrupt level
370  *
371  ******************************************************************************/
372 
373 /* interrupt vector allocation - one for each XY566 DIL card */
374 MODULE_TYPES_DEF(int AI566_VNUM)
375 #ifdef MODULE_TYPES_INIT
376  =0xf8; /* Xycom 566 Differential Latched */
377 #endif
378 
379 /* interrupt vector allocation - one for each DVX card */
380 MODULE_TYPES_DEF(int DVX_IVEC0)
381 #ifdef MODULE_TYPES_INIT
382  =0xd0;
383 #endif
384 
385 /* stepper motor interrupt vector - one for each motor */
386 MODULE_TYPES_DEF(int MD_INT_BASE)
387 #ifdef MODULE_TYPES_INIT
388  =0xf0; /* base of the motor int vector */
389 #endif
390 
391 /* I reserve from here up to num_cards * 4 interrupting chans/card - joh */
392 MODULE_TYPES_DEF(int MZ8310_INT_VEC_BASE)
393 #ifdef MODULE_TYPES_INIT
394  =0xe8;
395 #endif
396 
397 /* Allen-Bradley Serial Driver - MAX_AB_LINKS number of vectors */
398 MODULE_TYPES_DEF(int AB_VEC_BASE)
399 #ifdef MODULE_TYPES_INIT
400  =0x60;
401 #endif
402 
403 /* only one interrupt vector allocated for all Joerger VTR1 boards joh */
404 MODULE_TYPES_DEF(int JGVTR1_INT_VEC)
405 #ifdef MODULE_TYPES_INIT
406  =0xe0;
407 #endif
408 
409 /* AT830X_1 cards have 1 intr vector for each AT830X_1_num_cards (presently 2) */
410 MODULE_TYPES_DEF(int AT830X_1_IVEC0)
411 #ifdef MODULE_TYPES_INIT
412  =0xd4;
413 #endif
414 
415 /* AT830X cards have 1 intr vector for each AT830X_num_cards (presently 2) */
416 MODULE_TYPES_DEF(int AT830X_IVEC0)
417 #ifdef MODULE_TYPES_INIT
418  =0xd6;
419 #endif
420 
421 /* AT8 fast protect interrupt vector base */
422 MODULE_TYPES_DEF(int AT8FP_IVEC_BASE)
423 #ifdef MODULE_TYPES_INIT
424  =0xa2;
425 #endif
426 
427 
428 MODULE_TYPES_DEF(int AT8FPM_IVEC_BASE )
429 #ifdef MODULE_TYPES_INIT
430  =0xaa;
431 #endif
432 
433 
434 /******************************************************************************
435  *
436  * Addresses and IRQ information used by the XVME402 bitbus cards.
437  *
438  ******************************************************************************/
439 MODULE_TYPES_DEF(unsigned short BB_SHORT_OFF )
440 #ifdef MODULE_TYPES_INIT
441  = 0x1800; /* the first address of link 0's region */
442 #endif
443 #define BB_NUM_LINKS 4 /* max number of BB ports allowed */
444 MODULE_TYPES_DEF(int BB_IVEC_BASE )
445 #ifdef MODULE_TYPES_INIT
446  = 0xa0; /* vectored interrupts (2 used for each link) */
447 #endif
448 MODULE_TYPES_DEF(int BB_IRQ_LEVEL )
449 #ifdef MODULE_TYPES_INIT
450  = 5; /* IRQ level */
451 #endif
452 
453 /******************************************************************************
454  *
455  * Information for the PEP modular Bitbus boards.
456  *
457  ******************************************************************************/
458 MODULE_TYPES_DEF(unsigned short PEP_BB_SHORT_OFF )
459 #ifdef MODULE_TYPES_INIT
460  = 0x1c00;
461 #endif
462 MODULE_TYPES_DEF(int PEP_BB_IVEC_BASE )
463 #ifdef MODULE_TYPES_INIT
464  = 0xe8;
465 #endif
466 
467 /******************************************************************************
468  *
469  * Addresses and IRQ information used by the NI1014 and NI1014D bitbus cards.
470  *
471  ******************************************************************************/
472 MODULE_TYPES_DEF(unsigned short NIGPIB_SHORT_OFF)
473 #ifdef MODULE_TYPES_INIT
474  = 0x5000;/* First address of link 0's region */
475 #endif
476  /* Each link uses 0x0200 bytes */
477 #define NIGPIB_NUM_LINKS 4 /* Max number of NI GPIB ports allowed */
478 MODULE_TYPES_DEF(int NIGPIB_IVEC_BASE )
479 #ifdef MODULE_TYPES_INIT
480  = 100; /* Vectored interrupts (2 used for each link) */
481 #endif
482 MODULE_TYPES_DEF(int NIGPIB_IRQ_LEVEL )
483 #ifdef MODULE_TYPES_INIT
484  =5; /* IRQ level */
485 #endif
486 
487 #if 0 /* JRW */
488 #define NI1014_LINK_NUM_BASE 0
489 #endif
490 
491 /*
492  * nothing after this endif
493  */
494 #endif /*INCLmodule_typesh*/
#define MAX_WF_TYPES
Definition: module_types.h:226
#define MAX_BO_TYPES
Definition: module_types.h:174
#define MAX_SM_TYPES
Definition: module_types.h:199
#define MAX_TM_TYPES
Definition: module_types.h:261
#define MAX_BI_TYPES
Definition: module_types.h:143
#define MAX_AO_TYPES
Definition: module_types.h:112
#define MODULE_TYPES_DEF(MT_DEF_PARM)
Definition: module_types.h:37
#define MAX_AI_TYPES
Definition: module_types.h:81